Mixel’s MIPI D-PHY in NXP's S32V234
The NXP design that utilizes the MIPI interface is called the S32V234, as shown in Figure 3 (see upper left-hand corner). The S32V is an ADAS solution for vision, sensor fusion and surround view applications. It features a quad-core ARM Cortex-A53 processor, the NXP APEX Image Cognition Processor, Vivante GC3000 Processing Unit, and an advanced memory bus system architecture.
The system is designed to interface with a variety of image sensors, like the Sony IMX224. That sensor has a MIPI CSI-2 interface for linking the sensor to a system-level chip like the SV32. The MIPI CSI-2 interfaces have a maximum output data rate of 1.5 Gbps/lane, and the number of output channels can be selected from 1ch, 2ch or 4ch (lanes).
A key part of this system is the transfer of the raw image data to the SV32 built-in image signal processor (ISP) with low or zero latency. The raw data is the processed efficiently using an advanced high performance SRAM system that compliments the tradition DDR memory management making the image processing in real time.
The raw data transfer from the Camera to the S32V is accomplished via a MIPI CSI-2, D-PHY interface and received by the Rx D-PHY hard macro. The data is serialized and transferred at a high speed to allow flicker free processing.